An unknow Risc-V ultralow power project: Honey Bunny

Today cpus require a lot of power, even at mere 5nm and 7nm. But as we know the open source type of cpus called RiscV are growing each year more and this time i will show you a design which is ridicolously good at reducing power comsumption. The cpu in question is called Honey Bunny and pertain to Pulp type (Parallel Ultra Low Power). This cpu is made in this way(from Research Gate data):

-Max Freq. 625Mhz with 2.5 GOps performance
-4 RV32-ICM RI5CY cores
-Node Global foundries 28nm
-Total area of 2 MGE
-Dimensions of 1500μm x 2000μm
-Core voltage of 0.6V to 1.2V
-Io voltage of 1.8V
-64kB L1, 256kB L2

The schematic of Honey Bunny processor

The processor deliver the 2.5 GOps at stunning 55mW power consumption. Plus, the platform(Cores + external circuitry) delivers up to 38X energy efficiency increase over ARM cortex M platform. I also need to mention that the L1 cache is a TDCM memory which is shared among cores, and then the L2 , which is Sram based memory.
The secret sauce is here is the presence of a small 4kb SCell memory which permit the operation ’till the extreme voltage point of just 0.6V. Futuristic is the word here.

It is incredible and convenient for battery power always-on circuits. The things that could accomplish this cpu doesn’t stop here. In facts the cpu is also used in wearables and could be connected through a 64 channels to tactile sensors or ECG sensors. Embedded in the platform there are also to mention a Bluetooth low energy module and inertial sensors.

Links
https://www.researchgate.net/publication/335074446_A_RISC-V_Based_Open_Hardware_Platform_for_Always-On_Wearable_Smart_Sensing